EDN

How to Manage Clock Jitter Noise for Accurate Timing Sign-off

With shrinking process nodes and increasing operating frequencies, designers face the challenges of managing noise caused by signal crosstalk and dynamic voltage drop to meet their timing requirements ...
Business Wire

TSMC Reference Flow 9.0 Covers Extreme GoldTime Sign-off Timing Analysis

SANTA CLARA, Calif.--(BUSINESS WIRE)--Extreme DA ™ today announced that TSMC Reference Flow 9.0 covers the GoldTime ™ Statistical timing analyzer. Supporting 40nm process technology, Reference Flow ...
Semiconductor Engineering

The Challenge Of Balancing Performance And Accuracy For Advanced Node Timing Signoff

As process nodes shrink, complexity, cost and overall risk expand. Process variability that once was once acceptable now becomes a critical item as operating voltage decreases. Simply adding design ...
EDN

Synopsys, ST collaborate on SoC timing sign-off

MUNICH, Germany — EDA software vendor Synopsys, Inc. has announced to intensify its ties with chip vendor STMicroelectronics. The focus of the efforts centers on timing analysis and signal integrity ...